c - Multiple compilations with makefile -


i've been having serious trouble makefiles, i'm trying run commands in , far of changes made resulted in "nothing done 'all'" no matter change lines, don't work. example, prog4 should have worked below says nothing done.

bin_dir = bin lex_dir = lexyacc-code lib_dir = lib src_dir = src obj_dir = obj  cc = gcc bs = bison fx = flex cflags = -i$(lib_dir)  srcs = $(wildcard $(lex_dir)/calc3b.c) srcs2 = $(wildcard $(lex_dir)/calc3.y) srcs3 = $(wildcard $(lex_dir)/calc3.l) srcs4 = $(wildcard $(obj_dir)/y.tab.c) srcs5 = $(wildcard $(obj_dir)/lex.yy.c)  objs = $(patsubst $(lex_dir)/%.c,$(obj_dir)/%.o,$(srcs))   prog = calc3b prog2 = y.tab rm = rm -f  mvv="$(shell mv y.tab.c obj)"; echo $mvv   all: $(prog2) $(prog4)    $(prog): $(objs)     $(cc) $^ -o $(prog)  $(prog2):     $(bs) -y -d $(srcs2)    $(prog4): $(cc) -c $(srcs4) $(srcs5) $(cflags)   $(obj_dir)/%.o: $(lex_dir)/%.c     $(cc) $(cflags) -c $< -o $@   clean:     $(rm) $(prog) $(objs)

only prog2 working, result have header , source file tried move specific folders did 'mv' command (i know against makefile).

the commands these:

bison -y -d calc3.y flex calc3.l gcc -c y.tab.c lex.yy.c gcc y.tab.o lex.yy.o calc3b.c -o calc3b.exe

first command, have 1 header , source result.

second have 1 source result.

third have 2 objects file result.

and fourth, have 1 executable.

therefore, need move files specific folders.

can me out this? thanks.

i think problem $(prog4) forgot put command on new line tab. in you've showed above, whole line of command placed should dependency not command. therefore, makefile executes no command $(prog4).


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